Advanced Search
Article Contents
Article Contents

Variable fractional delay filter design with discrete coefficients

Abstract Related Papers Cited by
  • This paper investigates the optimal design of variable fractional delay (VFD) filter with discrete coefficients as a means of achieving low complexity and efficient hardware implementation. The filter coefficients are expressed as the sum of signed power-of-two (SPT) terms with a restriction on the total number of power-of-two terms. An optimization problem with least squares criterion is formulated as a mixed-integer programming problem. An optimal scaling factor quantization scheme is applied to the problem resulting in an optimal scaling factor quantized solution. This solution is then improved further by applying a discrete filled function, that has been extended for a mixed integer optimization problem. To apply the discrete filled function method, it requires multiple calculations of the objective function around the neighborhood of a searched point. Thus, an updating scheme is developed to efficiently calculate the objective function in a neighborhood of a point. Design examples demonstrate the effectiveness of the proposed optimization approach.
    Mathematics Subject Classification: Primary: 58F15, 58F17; Secondary: 53C35.


    \begin{equation} \\ \end{equation}
  • [1]

    H. H. Dam, A. Cantoni, K. L. Teo and S. Nordholm, Variable digital filter with least square criterion and peak gain constraints, IEEE Trans. Circuits Systems II, 54 (2007), 24-28.


    H. H. Dam, A. Cantoni, K. L. Teo and S. Nordholm, Variable digital filter with group delay flatness specification or phase constraints, IEEE Trans. Circuits Systems II, 55 (2008), 442-446.


    H. H. Dam, A. Cantoni, K. L. Teo and S. Nordholm, FIR variable digital filter with signed power-of-two coefficients, IEEE Trans. Circuits Systems I, 54 (2007), 1348-1357.doi: 10.1109/TCSI.2007.897775.


    H. H. Dam, Design of allpass variable fractional delay filter with powers-of-two coefficients, IEEE Signal Processing Letters, 22 (2015), 1643-1646.doi: 10.1109/LSP.2015.2420652.


    H. H. Dam, Design of variable fractional delay filter with fractional delay constraints, IEEE Signal Processing Letters, 21 (2014), 1361-1364.doi: 10.1109/LSP.2014.2336662.


    H. H. Dam and K. L. Teo, Allpass VFD filter design, IEEE Trans. Signal Processing, 58 (2010), 4432-4436.doi: 10.1109/TSP.2010.2048316.


    H. H. Dam, Variable Fractional Delay Filter with Sub-Expressions Coefficients, International Journal of Innovative Computing, Information and Control, 9 (2013), 2995-3003.


    T.-B. Deng and S. Chivapreecha, Bi-minimax design of even-order variable fractional-delay FIR digital filters, IEEE Trans. Circuits Systems I: Reg. Paper, 59 (2012), 1766-1774.doi: 10.1109/TCSI.2011.2180431.


    T.-B. Deng and W. Qin, Coefficient relation-based minimax design and low-complexity structure of variable fractional-delay digital filters, Signal Processing, 93 (2013), 923-932.doi: 10.1016/j.sigpro.2012.11.004.


    T.-B. Deng, Decoupling minimax design of low-complexity variable fractional-delay FIR digital filters, IEEE Trans. Circuits Syst. I: Reg. Papers, 58 (2011), 2398-2408.doi: 10.1109/TCSI.2011.2123510.


    C. W. Farrow, A continuously variable digital delay element, in Proc. IEEE Int. Symp. Circuits Syst., Vol. 3, IEEE, 1988, 2641-2645.doi: 10.1109/ISCAS.1988.15483.


    Y.-D. Huang, S.-C. Pei and J.-J. Shyu, WLS design of variable fractional-delay FIR filters using coefficient relationship, IEEE Trans. Circuits Systems II: Express Brief, 56 (2009), 220-224.


    D. Li, Y. C. Lim and Y. Lian, A polynomial-time algorithm for designing FIR filters with power-of-two coefficients, IEEE Trans. Signal Processing, 50 (2002), 1935-1941.


    Y. C. Lim, Design of discrete-coefficient-value linear phase FIR filters with optimum normalized peak ripple magnitude, in IEEE Trans. Circuits Systems, 37 (1990), 1480-1486.doi: 10.1109/31.101268.


    H. Lin, Y. Wang and X. Wang, An auxiliary function method for global minimization in integer programming, Mathematical Problems in Engineering, 2011 (2011), 1-13.doi: 10.1155/2011/402437.


    C. K. S. Pun, Y. C. Wu, S. C. Chan and K. L. Ho, On the design and efficient implementation of the Farrow structure, IEEE Signal Processing Letters, 10 (2003), 189-192.doi: 10.1109/LSP.2003.813681.

  • 加载中

Article Metrics

HTML views() PDF downloads(80) Cited by(0)

Access History

Other Articles By Authors



    DownLoad:  Full-Size Img  PowerPoint